XC5202-6PC84I FPGA 3K Gates 256 Cells 83MHz 0.5um (CMOS) Technology 5V 84-PLCC
Tax included.
This listing is for (1pc) of XC5202-6PC84I by Xilinx
Mfr Package Description PLASTIC, LCC-84
Status Discontinued
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Clock Frequency-Max 83.0 MHz
Combinatorial Delay of a CLB-Max 5.6 ns
JESD-30 Code S-PQCC-J84
JESD-609 Code e0
Moisture Sensitivity Level 3
Number of CLBs 64.0
Number of Equivalent Gates 2000.0
Number of Inputs 84.0
Number of Logic Cells 64.0
Number of Outputs 84.0
Number of Terminals 84
Organization 64 CLBS, 2000 GATES
Package Body Material PLASTIC/EPOXY
Package Code QCCJ
Package Equivalence Code LDCC84,1.2SQ
Package Shape SQUARE
Package Style CHIP CARRIER
Peak Reflow Temperature (Cel) 225
Power Supplies 5
Qualification Status Not Qualified
Seated Height-Max 5.08 mm
Sub Category Field Programmable Gate Arrays
Supply Voltage-Nom 5.0 V
Supply Voltage-Min 4.5 V
Supply Voltage-Max 5.5 V
Surface Mount YES
Technology CMOS
Terminal Finish Tin/Lead (Sn85Pb15)
Terminal Form J BEND
Terminal Pitch 1.27 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Length 29.3116 mm
Width 29.3116 mm
Additional Feature MAX AVAILABLE 3000 LOGIC GATES