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XC3090A-7PC84C Xilinx FPGA 320 CLBs, 5000 Gates, 113MHz, 320-Cell, CMOS, PLCC84
XC3090A-7PC84C Xilinx FPGA 320 CLBs, 5000 Gates, 113MHz, 320-Cell, CMOS, PLCC84
XC3090A-7PC84C Xilinx FPGA 320 CLBs, 5000 Gates, 113MHz, 320-Cell, CMOS, PLCC84
XC3090A-7PC84C Xilinx FPGA 320 CLBs, 5000 Gates, 113MHz, 320-Cell, CMOS, PLCC84

XC3090A-7PC84C Xilinx FPGA 320 CLBs, 5000 Gates, 113MHz, 320-Cell, CMOS, PLCC84

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This listing is for (1) XC3090A-7PC84C by Xilinx

Status Discontinued
Additional Feature MAX USABLE 6000 LOGIC GATES
Clock Frequency-Max (MHz) 113.00000
Combinatorial Delay of a CLB-Max (ns) 5.1000000000000000
JESD-30 Code S-PQCC-J84
J-STD-609 Code e0
Length (mm) 29.3116
Moisture Sensitivity Level 3
Number of CLBs 320
Number of Equivalent Gates 5000
Number of Inputs 70
Number of Logic Cells 320
Number of Outputs 70
Number of Terminals 84
Operating Temperature-Max (Cel) 85.0
Operating Temperature-Min (Cel) 0.0
Organization 320 CLBS, 5000 GATES
Package Body Material PLASTIC/EPOXY
Package Code QCCJ
Package Equivalence Code LDCC84,1.2SQ
Package Shape SQUARE
Package Style CHIP CARRIER
Peak Reflow Temperature (Cel) 225
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
DLA Qualification Not Qualified
Seated Height-Max (mm) 5.0800
Supply Voltage-Max (V) 5.25000
Supply Voltage-Min (V) 4.75000
Supply Voltage-Nom (V) 5
Surface Mount YES
Technology CMOS
Temperature Grade OTHER
Terminal Finish Tin/Lead (Sn85Pb15)
Terminal Form J BEND
Terminal Pitch (mm) 1.270
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Width (mm) 29.3116