DEV-ADC34J22 ADC HSMC MODULE Dallas Logic

Module Details :

Quad ADC Module supporting JESD204B, Subclass 0 and 1.

Features Texas Instruments new ADC34J22 JESD204B ADC device.

Showcases JESD204B using Altera’s Cyclone V family of FPGAs.

Two RF DC Coupled input channels via TIs new THS4541 differential amplifier.

Two RF AC Coupled input channels.

DC Input – Input Range +/-0.5V (1Vpp), DC-15 MHz

AC Input – Input Range +/-1.0V (2Vpp), 0.5 – 200 MHz

External Clock and Trigger input.

Compatible with ARROW Electronics SOCKIT Cyclone V evaluation platform.

Reference design available for SOCKIT board.

VHDL based design files (Quartus) include MTI’s JESD core instantiation.

DEV-ADC34J22 module is configured at power-up by SOCs ARM processor (ADC and LMK04828).

Information :

The DEV-ADC34J22 module is based on Altera’s® HSMC (High Speed Mezzanine Card) specification.  The module provides the following primary devices:

Texas Instruments ADC34J22 ADC device

Supports sampling rates up to 50MSPS at 12 bit resolution

Texas Instruments LMK04828B Clock IC with Jitter Cleaner

10 MHz TCXO Reference Oscillator

100 MHz VCXO – First Loop VCO

Texas Instruments THS4541 Differential Amplifier

The DEV-ADC34J22 module is intended to be connected to ARROW® Electronic’s SOCKIT CYCLONE V development platform via the HSMC connector.  The DEV-ADC34J22 provides a reference clock to the SOCKIT host FPGA system board, and can also utilize external trigger and reference clock inputs.  Other HSMC based FPGA host boards can also be utilized.