(2PCS) GAL16V8A-25LP Lattice EE PLD, 25ns, PAL-Type, CMOS, PDIP20
Tax included.
This listing is for (2pcs) of GAL16V8A-25LP by Lattice
Mfr Package Description PLASTIC, DIP-20
Status Discontinued
Programmable Logic Type EE PLD
Architecture PAL-TYPE
Clock Frequency-Max 37.0 MHz
JESD-30 Code R-PDIP-T20
JESD-609 Code e0
Number of Dedicated Inputs 8.0
Number of I/O Lines 8.0
Number of Inputs 18.0
Number of Outputs 8.0
Number of Product Terms 64.0
Number of Terminals 20
Operating Temperature-Min 0.0 Cel
Operating Temperature-Max 75.0 Cel
Organization 8 DEDICATED INPUTS, 8 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code DIP
Package Equivalence Code DIP20,.3
Package Shape RECTANGULAR
Package Style IN-LINE
Power Supplies 5
Propagation Delay 25.0 ns
Qualification Status Not Qualified
Seated Height-Max 4.57 mm
Sub Category Programmable Logic Devices
Supply Voltage-Nom 5.0 V
Supply Voltage-Min 4.75 V
Supply Voltage-Max 5.25 V
Surface Mount NO
Technology CMOS
Temperature Grade COMMERCIAL EXTENDED
Terminal Finish Tin/Lead (Sn/Pb)
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL
Length 26.125 mm
Width 7.62 mm
Additional Feature 8 MACROCELLS; 1 EXTERNAL CLOCK; REGISTER PRELOAD; SHARED INPUT/CLOCK