(1PC) ISPLSI1024-60 PLSI1024-60LJ Lattice EE PLD, 25ns, 96-Cell, CMOS, PLCC68

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This listing is for (1PC) of ISPLSI1024-60 PLSI1024-60LJ by Lattice Semiconductor


Mfr Package Description PLASTIC, LCC-68
Status Discontinued
Programmable Logic Type EE PLD
Clock Frequency-Max 38.0  MHz
In-System Programmable NO
JESD-30 Code S-PQCC-J68
JESD-609 Code e0
JTAG BST NO
Moisture Sensitivity Level 3
Number of Dedicated Inputs 6.0
Number of I/O Lines 48.0
Number of Macro Cells 96.0
Number of Terminals 68
Operating Temperature-Min 0.0  Cel
Operating Temperature-Max 70.0  Cel
Organization 6 DEDICATED INPUTS, 48 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code QCCJ
Package Equivalence Code LDCC68,1.0SQ
Package Shape SQUARE
Package Style CHIP CARRIER
Peak Reflow Temperature (Cel) 225
Power Supplies 5
Propagation Delay 25.0  ns
Qualification Status Not Qualified
Seated Height-Max 4.57  mm
Sub Category Programmable Logic Devices
Supply Voltage-Nom 5.0  V
Supply Voltage-Min 4.75  V
Supply Voltage-Max 5.25  V
Surface Mount YES
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish TIN LEAD
Terminal Form J BEND
Terminal Pitch 1.27  mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Length 24.2316  mm
Width 24.2316  mm
Additional Feature 4 EXTERNAL CLOCKS

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