(1PC) EPM7128ELC84-7 ALTERA IC CPLD 128MC 7.5NS 84PLCC

Status Transferred

Additional Feature 128 MACROCELLS; CONFIGURABLE I/O OPERATION (3.3V OR 5V); 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK

Clock Frequency-Max (MHz) 166.70000

In-System Programmable NO

JESD-30 Code S-PQCC-J84

J-STD-609 Code e0

JTAG BST NO

Length (mm) 29.3116

Moisture Sensitivity Level 2

Number of Dedicated Inputs 0

Number of I/O Lines 68

Number of Macro Cells 128

Number of Terminals 84

Operating Temperature-Max (Cel) 70.0

Operating Temperature-Min (Cel) 0.0

Organization 0 DEDICATED INPUTS, 68 I/O

Output Function MACROCELL

Package Body Material PLASTIC/EPOXY

Package Code QCCJ

Package Equivalence Code LDCC84,1.2SQ

Package Shape SQUARE

Package Style CHIP CARRIER

Peak Reflow Temperature (Cel) 220

Programmable Logic Type EE PLD

Propagation Delay (ns) 7.500

DLA Qualification Not Qualified

Seated Height-Max (mm) 5.0800

Supply Voltage-Max (V) 5.25000

Supply Voltage-Min (V) 4.75000

Supply Voltage-Nom (V) 5

Surface Mount YES

Technology CMOS

Temperature Grade COMMERCIAL

Terminal Finish TIN LEAD

Terminal Form J BEND

Terminal Pitch (mm) 1.270

Terminal Position QUAD

Time@Peak Reflow Temperature-Max (s) 20

Width (mm) 29.3116