(1PC) EPM7128STC100-7 EE PLD, 7.5ns, 128-Cell, CMOS, PQFP100

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THIS LISTING IS FOR (1PC) OF EPM7128STC100-7 BY ALTERA

Mfr Package Description TQFP-100
Status Transferred
Programmable Logic Type EE PLD
Clock Frequency-Max 166.7  MHz
In-System Programmable YES
JESD-30 Code S-PQFP-G100
JESD-609 Code e0
JTAG BST YES
Moisture Sensitivity Level 3
Number of Dedicated Inputs 0.0
Number of I/O Lines 84.0
Number of Macro Cells 128.0
Number of Terminals 100
Operating Temperature-Min 0.0  Cel
Operating Temperature-Max 70.0  Cel
Organization 0 DEDICATED INPUTS, 84 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code LFQFP
Package Equivalence Code TQFP100,.63SQ
Package Shape SQUARE
Package Style FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Cel) 235
Power Supplies 3.3/5,5
Propagation Delay 7.5  ns
Qualification Status Not Qualified
Seated Height-Max 1.27  mm
Sub Category Programmable Logic Devices
Supply Voltage-Nom 5.0  V
Supply Voltage-Min 4.75  V
Supply Voltage-Max 5.25  V
Surface Mount YES
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish Tin/Lead (Sn/Pb)
Terminal Form GULL WING
Terminal Pitch 0.5  mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 20
Length 14.0  mm
Width 14.0  mm
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V