(10 PCS) 74F109DC FSC Dual JK Positive Edge Triggered Flip-Flop, CDIP-16PIN
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THIS LISTING IS FOR (10 PCS) OF 74F109DC BY FSC
Dual JK Positive Edge Triggered Flip-Flop, CDIP-16PIN
Manufacturer: Fairchild Semiconductor
Description: F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Mfr Package Description
Dual JK Positive Edge Triggered Flip-Flop, CDIP-16PIN
Part #: 74F109DC
Part Category: Logic ICsManufacturer: Fairchild Semiconductor
Description: F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Mfr Package Description
| CERAMIC, DIP-16 | |
| Status | Discontinued |
| Logic IC Type | J-KBAR FLIP-FLOP |
| Sub Category | FF/Latches |
| Family | F/FAST |
| fmax-Min | 125.0 MHz |
| JESD-30 Code | R-GDIP-T16 |
| JESD-609 Code | e0 |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Number of Terminals | 16 |
| Operating Temperature-Min | 0.0 Cel |
| Operating Temperature-Max | 70.0 Cel |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | CERAMIC, GLASS-SEALED |
| Package Code | DIP |
| Package Equivalence Code | DIP16,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Power Supplies (V) | 5 |
| Propagation Delay (tpd) | 9.2 ns |
| Qualification Status | Not Qualified |
| Seated Height-Max | 5.08 mm |
| Supply Voltage-Nom (Vsup) | 5 |
| Supply Voltage-Min (Vsup) | 4.75 V |
| Supply Voltage-Max (Vsup) | 5.25 V |
| Surface Mount | NO |
| Technology | TTL |
| Temperature Grade | COMMERCIAL |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54 mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Trigger Type | POSITIVE EDGE |
| Length | 19.43 mm |
| Width | 7.62 mm |